This invention relates to a method for fabricating packaged circuit units containing hermetically sealed integrated circuit chips having externally extending lead frame terminals, and more particularly the invention relates to a fast, reliable method for fabricating such hermetically sealed units in strip form on an assembly line basis.
In one method currently employed for fabricating such packaged circuits the terminal pads of the integrated circuit chips are first secured to the converging ends of a converging pattern of conductive paths known in the art as a spider lead assembly which has been formed previously on a suitable tape material, such as Kapton tape or it can be formed by etching or stamping from a solid sheet of metal. A portion of the acetate tape containing one of the chip-supporting spider assemblies is separated from the tape and mounted in a lead frame structure which is stamped iteratively in a strip from flat metal stock. The conductive paths of the spider are bonded, usually by thermocompression bonding, soldering, brazing or other suitable means for joining metals together conductively, to those ends of the conductive paths or terminals of the lead frame which converge towards a common opening within which the chip supporting spider assembly is positioned. The resulting structure is one in which the small and delicate terminal pads on the edge of the integrated circuit chip are connected to the converging ends of the conductive paths of the spider assembly, and the diverging ends of the conductive paths of the spider assembly are in turn connected to the converging ends of the lead frame conductive paths, also referred to herein as the lead frame terminals. The resulting structure is then encapsulated in plastic in such a manner that the second (divergent) ends of the lead frame terminals extend out of the plastic for connection into a circuit board, or other suitable terminating means. The diverging ends of the lead frame terminals can later be connected directly into a circuit board, for example.
One problem experienced with the foregoing method arises from the fact that the molten plastic comes into physical contact with the integrated circuit chip when encapsulation occurs. Because of the heat and also because of possible chemical reaction between the plastic and the chip, only limited types of plastic can be employed. Such plastics include certain epoxys and certain high quality silicone resins, both of which are thermal setting, which means that a considerable period of time is needed for the molten plastic to become sufficiently hard for handling purposes. Further, these epoxys and silicone resins are expensive and, because of their thermal setting characteristics, the scrap material cannot be reused. When millions of circuit packages are fabricated the cost of the unuseable material becomes quite substantial. A 50 percent loss is common.
A further disadvantage of the above-described prior art method of production is that it is limited to batch processing rather than a continuous assembly line type of processing. Batch processing, which consists of "sticks" of the circuit packages being processed on an individual basis, is relatively slow and costly.
In another prior art method employed today the lead frame structures are iteratively stamped from a strip of metal with the same general configuration as the lead frame configuration described above, that is, with the first free ends thereof converging around the edges of an open area and having second free ends which extend away from said open area in a generally divergent pattern. The portions of the lead frame terminals between the convergent and divergent ends thereof are encapsulated in plastic to form a plastic frame defining a window around said open area with the convergent ends of the lead frame terminals extending out of the inner edges of the plastic frame and into said window area, and with the diverging ends of the lead frame terminals extending out of the outer edges of the plastic frame.
Because the molten plastic does not come in contact with the integrated circuit chips, the lead frames can be encapsulated with inexpensive plastics which harden very rapidly thus permitting rapidly incremented or continuous assembly line procedures for the fabrication of the premolded plastic lead frames which occurs prior to the addition of the spider and circuit chip to the assembly.
In this last-mentioned method the individual integrated circuit chips are brazed onto a relatively heavy metal cap, or cover, plated with gold or silver and the resulting assembly then glued within the window formed by the plastic frame. The chip itself should be backed with a suitable material such as gold or other noble metal to permit brazing onto the gold or sliver plated cap.
Next, the small, raised terminal pads on the edge of the integrated circuit chip are connected to the gold or silver plated free ends of the lead frame terminals, which must be plated with a noble metal such as gold or silver, by small gold or aluminum wires individually connected between the terminals of the circuit chip and the lead frame terminals.
Finally, the window space is filled with a suitable sealant such as a silicone gel. The sealant completely surrounds the integrated circuit chip and substantially completely fills the window space. A second cap is then glued over the still open side of the window space to hold the sealant therein. The sealant should have chemical properties of relatively low molecular cross-linking to avoid penetration of moisture therethrough and onto the surface of the integrated circuit chip.
A major problem of the last-mentioned method is that about 300 milliseconds are required to bond or terminate one end of one of the fine wires. If there are 14 such fine wires the total time for securing the fine wires between the chips and the lead frame terminals is usually at the rate of about 29 bonds per minute.